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The zero voltage state in a logic circuit. Though it may not be actually zero, it is considered a logical zero. In TTL circuits, it is below 2.4 volts but the input sinks or draws current. In CMOS designs, it is below 3.2 volts and the input does NOT sink current. The supply voltage is assumed to be 5 volts.

low_or_lo.txt · Last modified: 2006/10/15 09:35 (external edit)