Differences

This shows you the differences between two versions of the page.

--- dipcore32 [2018/08/30 13:57] – [dipCore32] antichambre
+++ dipcore32 [2018/09/03 23:44] (current) – removed antichambre
@@ Line 1: / Line 1: @@
-====== dipCore32 ======
-{{ :antichambre:fichier_29-08-2018_18_32_51.png?400 |}}
-**A reduced Core for your MIDIbox App, an STM32F405RG in a DIP40 format.**
-\\
-\\
-===== Features =====
-  * MIOS32 uses same processor family and drivers(no deep change).
-  * Same internal hardware as Disco or wCore (speed, memory, peripherals, etc...) .
-  * Board pinout and package compatible with a MIOS8 PIC 8-)
-  * USB connector onboard.
-  * 5V power input and led.
-  * 3.3V regulator and led on board.
-  * 74HCT541 on board for the 5V output ports.
-  * User and Reset buttons.
-  * 2 user leds.
-  * 8 extra pins for USB, buttons and leds.
-  * Your favorite Core is now a current component easy to integrate.
-All commons MIOS32 ports are available except:
-  * General purpose J10x ports were removed.
-  * LCD port was reduced to a serial one, no more pins J15.D0-D7
-  * 2 UART only(2 MIDI In/2Out).
-  * 2 AIN channels only(e.g. pedal inputs)
-Check the [[dipboard32|dipBoard32]] for more details :-P
-\\
-\\
-----
-===== PCB =====
-<WRAP group>
-<WRAP column 50%>
-{{ :antichambre:1808_dipcore_v1.beta_top.png |}}
-\\
-{{ :antichambre:1808_dipcore_v1.beta_bottom.png |}}
-</WRAP>
-<WRAP column 45%>
-layers PCB design.\\
-Fits 4 layer mostly common design rules.
-  * min. drill 10mil
-  * min. width 5mil
-</WRAP>\\
-</WRAP>\\
-\\
-<WRAP column 50%>
-Top copper
-{{ :antichambre:1808_dipcore_v1.beta_layer_top.png |}}
-\\
-Internal 1
-{{ :antichambre:1808_dipcore_v1.beta_layer_int1.png |}}
-\\
-Internal 2
-{{ :antichambre:1808_dipcore_v1.beta_layer_int2.png |}}
-\\
-Bottom
-{{ :antichambre:1808_dipcore_v1.beta_layer_bottom.png |}}
-</WRAP>\\
-----
-===== Pinout =====
-=== First, was a chart. ===
-This chart gives you the equivalence between the different pinout and functions.\\
-<WRAP group>
-<WRAP column 80%>
-{{:antichambre:pinout_compare_chart2.png|}}
-</WRAP>
-<WRAP column>
-{{ :antichambre:pinout_compare_chart.png?120 |}}
-<wrap download>
-[[https://www.dropbox.com/s/eo3klb33xpp7law/1808_dipCore32_PinoutsAndFunctions.xls?dl=1|xls chart]]
-</wrap>
-</WRAP>
-</WRAP>
-\\
-=== The dipCore32 and the legacy MIOS32 ports. ===
-<WRAP group>
-<WRAP column 90%>
-Check [[dipboard32|dipBoard32]] for more details about the connectors.
-{{:antichambre:1808_dipcore_v1.beta_docu.png|}}
-</WRAP>
-</WRAP>
-\\
-===== 407VG vs 405RG =====
-<WRAP group>
-<WRAP column 60%>
-=== Legacy STM32F407 and 405 share the same characteristics. ===
-{{:antichambre:stm32f407_vs_405.png|}}
-</WRAP>
-<WRAP column 35%>
-The 405RG is a TQFP64, a 10x10mm package and only 64 pins.\\
-\\
-No Ethernet MAC and camera interface.\\
-\\
-</WRAP>
-</WRAP>
-[[https://www.st.com/en/microcontrollers/stm32f4-series.html?querycriteria=productId=SS1577|ST STM32F4xx series]]
-\\
-\\
-=== In MIOS32 ===
-We use the same peripheral drivers same family, some compilation defined conditions were added for the specific pinout and type, number of ports.
-<wrap round todo 7%>toDo</wrap>\\
-\\
-\\