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+ | This page will contain all of the information about the Coresound synth | ||
+ | link to forum topic: http://www.midibox.org/forum/index.php?topic=8150.0 | ||
+ | |||
+ | ====== Introduction ====== | ||
+ | Coresound is a digital synthesiser module based on the midibox platform.\\ | ||
+ | todo: add more info | ||
+ | |||
+ | ====== Features ====== | ||
+ | * Digital synthesiser for microchip pic microcontrollers | ||
+ | * 24 bit phase accumulator for frequency control | ||
+ | * wavetable signal generation | ||
+ | * waveshaper with 3 modes: hardclip, softclip and foldover | ||
+ | * 16 bit digital filter | ||
+ | * uses a modified [[midibox_sid]] engine for control/modulation | ||
+ | |||
+ | ====== Software ====== | ||
+ | |||
+ | ===== v0.1 ===== | ||
+ | This version uses a lfo, cc and env code from mb_sid v1.7\\ | ||
+ | the dco is a wavetable oscillator based on the Wiard Wavecity ROM | ||
+ | |||
+ | ===== v0.2 ===== | ||
+ | From v0.2 the modulation/control/cs will be seperated from the actual sound generation\\ | ||
+ | The data exchangement method is not decided yet, MBNET seems the best choice right now\\ | ||
+ | see this forum topic for more information: http://www.midibox.org/forum/index.php?topic=8328.0\\ | ||
+ | The sound unit registers will be refreshed each time the control routine is executed (f = 1kHz) | ||
+ | |||
+ | ==== Control unit ==== | ||
+ | The control unit will be based on the midibox sid engine\\ | ||
+ | but will be adapted to control the sound unit parameters. | ||
+ | |||
+ | ==== Sound unit ==== | ||
+ | The first tests will be done with the wavetable dco from v0.1,\\ | ||
+ | after this works alternate dco implementations will be tried | ||
+ | |||
+ | Register specification:\\ | ||
+ | * Satus register: | ||
+ | * Status: 1 byte | ||
+ | * DCO registers: | ||
+ | * Pitch: 3 bytes | ||
+ | * Waveform: 1 byte | ||
+ | * Interpolation: 1 byte | ||
+ | * Phase: 1 byte | ||
+ | * Free: 2nd oscillator: 6 bytes | ||
+ | * Waveshaper registers: | ||
+ | * Mode: 1 byte | ||
+ | * Type: 1 byte | ||
+ | * DCF registers: | ||
+ | * Cutoff: 1 byte | ||
+ | * Resonance: 1 byte | ||
+ | * Filter type: 1 byte | ||
+ | * DCA registers: | ||
+ | * Level: 1 byte | ||
+ | |||
+ | |||
+ | ==== MBNET ==== | ||
+ | My experiences with setting up a MBNET client: | ||
+ | * Copied MBNET.inc and SID_MBNET.inc from the sid folder to the project directory | ||
+ | * Renamed the SID_MBNET.inc to CRSND_MBNET.inc, changed all lables inside the file from SID_* to CRSND_* | ||
+ | * Changed the lables inside MBNET.inc to the new lables | ||
+ | * Copied the ping info from main.inc to my main .asm file, changed: | ||
+ | <code> | ||
+ | ;; MBNET specific definitions (ping reply information - don't touch this!) | ||
+ | #define MBNET_CONST_PROTOCOL_V 1 | ||
+ | #define MBNET_CONST_TYPE_C0 'S' | ||
+ | #define MBNET_CONST_TYPE_C1 'I' | ||
+ | #define MBNET_CONST_TYPE_C2 'D' | ||
+ | #define MBNET_CONST_TYPE_C3 ' ' | ||
+ | #define MBNET_CONST_TYPE_VERSION 1 | ||
+ | #define MBNET_CONST_TYPE_SUBVERSION 4685 | ||
+ | </code> | ||
+ | into: | ||
+ | <code> | ||
+ | #define MBNET_CONST_PROTOCOL_V 1 | ||
+ | #define MBNET_CONST_TYPE_C0 'C' | ||
+ | #define MBNET_CONST_TYPE_C1 'R' | ||
+ | #define MBNET_CONST_TYPE_C2 'S' | ||
+ | #define MBNET_CONST_TYPE_C3 'D' | ||
+ | #define MBNET_CONST_TYPE_VERSION 0 | ||
+ | #define MBNET_CONST_TYPE_SUBVERSION 2 | ||
+ | </code> | ||
+ | |||
+ | * Added the variables for MBNET in my app_defines.h: | ||
+ | <code> | ||
+ | MBNET_BASE EQU 0x600 ; used for SET_BSR | ||
+ | |||
+ | MBNET_STATE EQU 0x600 | ||
+ | MBNET_RX_BUFFER_PTR_L EQU 0x601 | ||
+ | MBNET_RX_BUFFER_PTR_H EQU 0x602 | ||
+ | MBNET_MY_ID EQU 0x603 | ||
+ | MBNET_MASTER_ID EQU 0x604 | ||
+ | MBNET_SLAVE_ID EQU 0x605 | ||
+ | MBNET_TOS EQU 0x606 | ||
+ | MBNET_EID_L EQU 0x607 | ||
+ | MBNET_EID_H EQU 0x608 | ||
+ | MBNET_NODE_AVAIL EQU 0x609 | ||
+ | MBNET_NODE_INCOMPATIBLE EQU 0x60a | ||
+ | MBNET_TIMEOUT_CTR_L EQU 0x60b | ||
+ | MBNET_TIMEOUT_CTR_H EQU 0x60c | ||
+ | MBNET_LOOP_CTR EQU 0x60d | ||
+ | MBNET_RETRY_WAIT_CTR EQU 0x60e | ||
+ | MBNET_RETRY_NODE EQU 0x60f | ||
+ | |||
+ | MBNET_RETRY_NODE_CTR_BEGIN EQU 0x610 ; ..0x617 | ||
+ | |||
+ | MBNET_NODE_INFO_BEGIN EQU 0x620 ; ..0x65f ; (8*8 bytes) | ||
+ | </code> | ||
+ | * To be continued :-) | ||
+ | |||
+ | ====== Hardware ====== | ||
+ | |||
+ | ===== v0.1 ===== | ||
+ | The hardware of the first version consists of a standard core board | ||
+ | and a DAC module with a anti-aliasing filter | ||
+ | |||
+ | |||
+ | ==== Schematic ==== | ||
+ | {{coresound:coresound.jpg?300x*}} click to enlarge \\ | ||
+ | |||
+ | ==== Connection diagram ==== | ||
+ | connection to core: | ||
+ | ^coresound pin ^core pin ^pic pin nr ^ | ||
+ | |1 |ground |-| | ||
+ | |2 |J15:D7 |40| | ||
+ | |3 |J15:D6 |39| | ||
+ | |4 |J15:D5 |38| | ||
+ | |5 |J15:D4 |37| | ||
+ | |6 |J15:D3 |36| | ||
+ | |7 |J15:D2 |35| | ||
+ | |8 |J15:D1 |34| | ||
+ | |9 |J15:D0 |33| | ||
+ | |10 |J14 |-| | ||
+ | |11 |+5v |-| | ||
+ | |||
+ | ===== v0.x ===== | ||
+ | The final version will use two pics, more info will follow | ||
+ | |||
+ | ==== Schematic ==== | ||
+ | Not available yet | ||
+ | |||
+ | ====== Todo ====== | ||
+ | |||
+ | ====== Suggestions ====== | ||
+ | Everybody can add suggestions here...\\ | ||
+ | \\ | ||
+ | \\ | ||
+ | |||
+ | |||
+ | back to [[user_projects]] | ||
+ | |||
+ | other projects by [[mess]] |