MIDIbox

This page is read only. You can view the source, but not change it. Ask your administrator if you think this is wrong.
====== ENCs module ======

Encoders illuminated with WS2812 LEDs

===== Schematic =====

Power input is +5V via a 3-pin 100mil connector (or Molex) and a Schottky diode. The value of electrolytic capacitor C1 is not critical.

The pLED chain enters via J2:pin 6 and resistor R1. The resistor should be replaced with a wire link for each additional module (i.e. only the first in the chain gets a resistor, the remainder stuffed with wire links). The serial chain then follows a snake pattern to J3, where additional pLED modules may be connected. The LED ID matches the capacitor name. The RC (R2, C18) end termination shouldn't be necessary, but can be trialled should problems with signal reflection arise.

Encoders are arranged in columns with outputs on J4--7. The top encoder (EN1/5/9/13 uses pins 10/9, the second (EN2/6/10/14) 8/7 etc. Note that the direction of these encoders is opposite to that of ALPS STEC-12. This needs to be accounted for in an MB_NG config file.


----


===== BOM v1.1 =====

^Type     ^Qty	^Value	^Package	^Parts^Notes^
^resistors^	
|         |1   |220-470R   |0204/7|R1|replace with wire link for each additional module|			
^capacitors^		
| |16|100n|1206|C2-17|
| |1|100-1000u|electrolytic 3,5-6|C1|
^diodes^	
| |1|1N5187|DO41-7.6|D1|	
| |16|WS2812B|5050|programmable LEDs|	
^encoders^	
| |16|clear shaft 12mm encoders| |EN1--16|	
^headers^	
| |6|		|2*5 (shrouded) THT|J2-5|can use DIL 100mil breakaway header strips|
| |1|	        |1X03_SMALL|J1| can use Molex 22-23-2031|
^misc^		
| |16| |spacer pieces| |optional |




===== Versions =====
v1.0: errata: J4--7 have no connection to ground. J1-3 do carry ground, so it isn't a problem if the DIN modules share the same power rail.

===== Assembly =====
FIXME
LEDs 

==== Interconnections ====
FIXME
  * J2 normally connects to Core J4B (I2C)
  * J3 carries the WS2812B chain for additional modules
  * J4 connects to a DIN header
  * J5 connects to a DOUT header


===== License =====

Currently the design is (c) 2016 antilog devices with all rights reserved; all documentation is CC BY-NC-SA 3.0.