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home:mbhp:module:core [2008/12/19 14:01] stryd_one Tidy-up |
home:mbhp:module:core [2008/12/19 14:16] stryd_one Moved PIC info in here |
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+ | \\ | ||
+ | ==== PIC ==== | ||
+ | The Microchip PIC18F series chips are used as the main microprocessor in the Core module. Details regarding the chips are as follows: | ||
+ | |||
+ | === 18F452 (I/P) === | ||
+ | [[:home:mbhp:pic:18F452]] | ||
+ | * About - This is the original chip used for MIOS/MBHP projects | ||
+ | * Basic Specs - | ||
+ | * Pros/Cons - Simple, widely used, but lacks some features seen in newer PIC18F variants | ||
+ | |||
+ | === 18F4620 === | ||
+ | [[:home:mbhp:pic:18F4620]] | ||
+ | |||
+ | * About - Almost identical to the '452, but with expanded codespace and RAM. | ||
+ | * Basic Specs - | ||
+ | * Pros/Cons - Should work wherever a '452 is specified, and also used in other apps such as MBSEQv3 where extra RAM is useful. Beware early revesions of this chip may suffer from the EUSART bug. | ||
+ | |||
+ | === 18F4685 === | ||
+ | [[:home:mbhp:pic:18F4685]] | ||
+ | |||
+ | * About - A more recent PIC18F with similar codespace and RAM to the '4620, but with some added peripherals. | ||
+ | * Basic Specs | ||
+ | * Pros/Cons - Contains a CAN buss peripheral for fast inter-processor communications >1Mbps and implementation of [[#MBNet]]. Slightly less codespace and RAM compared to the '4620, to accomodate these features. RAM handling differs from the 452/4620, so not all apps are compatible. | ||
===== Multiple Cores ===== | ===== Multiple Cores ===== |