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midibox_fm_21 [2016/04/24 00:03] sauraen created |
midibox_fm_21 [2016/04/24 00:10] sauraen [Connection of OPL3 module to STM32F4 core] |
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(Information from [[http://svnmios.midibox.org/filedetails.php?repname=svn.mios32&path=%2Ftrunk%2Fmodules%2Fopl3%2FReadme.txt]]) | (Information from [[http://svnmios.midibox.org/filedetails.php?repname=svn.mios32&path=%2Ftrunk%2Fmodules%2Fopl3%2FReadme.txt]]) | ||
- | The OPL3's Reset line must be buffered to 5 volts; all the other inputs may be driven by 3.3 volts. | + | The OPL3's Reset line must be buffered to 5 volts (that's why it's connected to J19, which has the buffer already); all the other inputs may be driven by 3.3 volts. All the digital pins of both OPL3 modules are connected together (in pairs, respectively), except for the #CS (#WR) pins which are connected separately so the core can send each chip different data. |
Pinout: | Pinout: | ||
- | OPL3 D7:0 -> PE15:8 (J10A D7:0) | + | * OPL3 D7:0 -> PE15:8 (J10A D7:0) |
- | OPL3 A1:0 -> PE7:6 (J10B D15:14) | + | * OPL3 A1:0 -> PE7:6 (J10B D15:14) |
- | OPL3 RS (#IC) -> PB8 (J19:RC2) | + | * OPL3 RS (#IC) -> PB8 (J19:RC2) |
- | First OPL3 WR (#CS, #WR) -> PE5 (J10B D13) | + | * First OPL3 WR (#CS, #WR) -> PE5 (J10B D13) |
- | Second OPL3 WR (#CS, #WR) -> PE4 (J10B D12) | + | * Second OPL3 WR (#CS, #WR) -> PE4 (J10B D12) |
The pins used for RS and the two CS pins may be changed by defining the appropriate things in your mios32_config.h file. See the README from the OPL3 module above. (Or just use the MIDIbox FM V2.1 code and hook the wires up as shown here.) | The pins used for RS and the two CS pins may be changed by defining the appropriate things in your mios32_config.h file. See the README from the OPL3 module above. (Or just use the MIDIbox FM V2.1 code and hook the wires up as shown here.) | ||
+ | |||
+ | The analog side of the OPL3 module may be built standard or customized to your liking (5V version, additional mixing that I added, etc.). This has no relation to how the digital side is connected to the core. |