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display_driver [2018/03/08 07:52] – [Versions] latigid_ondisplay_driver [2018/03/31 13:46] (current) – [Interconnection to Core] latigid_on
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 The second purpose is to use a chain of shift registers to provide chip select (CS) signals. It is functionally equivalent to a DOUT module, but the header is directly compatible with GPIO on the Core. The second purpose is to use a chain of shift registers to provide chip select (CS) signals. It is functionally equivalent to a DOUT module, but the header is directly compatible with GPIO on the Core.
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 +The pinout for the display connectors is as follows:
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 +{{:dispdriver:header_j1-j2.png?direct&600|}}\\
 +(Power is connected to pin 10.)
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 J15A1/J10B1 chain another Display Driver. Note that the J15 connection should not be mirrored for subsequent boards. J15A1/J10B1 chain another Display Driver. Note that the J15 connection should not be mirrored for subsequent boards.
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 +J9 is a power supply input that is sent to the displays over headers J1-J8. It may be better to wire the displays directly to the power supply rather than using the ribbon cable and connectors.
  
  
 ==== Dimensions ==== ==== Dimensions ====
  
-The PCB is 100*100mm with 3.6mm diameter holes centred 3.5mm from the edges.+The PCB is 100*100mm with 3.2mm diameter holes centred 3.5mm from the edges.
  
  
display_driver.1520495556.txt.gz · Last modified: 2018/03/08 07:52 by latigid_on