opn2_chip_t Union Reference

#include <genesis.h>

Collaboration diagram for opn2_chip_t:

[legend]

Data Fields
u8	ALL [144]
struct {
union {
u8   testreg21
struct {
u8   test_selrd14:1
u8   test_lfo_unk:1
u8   test_tmrspd:1
u8   test_nopg:1
u8   test_ugly:1
u8   test_noeg:1
u8   test_readdat:1
u8   test_readmsb:1
}
}
union {
u8   lforeg
struct {
u8   lfo_freq:3
u8   lfo_enabled:1
u8   dummy2:4
}
}
u8   timera_high
union {
u8   timeralowreg
struct {
u8   timera_low:2
u8   dummy5:6
}
}
u8   timerb
union {
u8   timerctrlreg
struct {
u8   timera_load:1
u8   timerb_load:1
u8   timera_enable:1
u8   timerb_enable:1
u8   timera_reset:1
u8   timerb_reset:1
u8   ch3_mode:2
}
}
union {
u8   gatereg
struct {
u8   gate_channel:3
u8   dummy8:1
u8   gate_op1:1
u8   gate_op2:1
u8   gate_op3:1
u8   gate_op4:1
}
}
u8   dac_high
union {
u8   dacenablereg
struct {
u8   dummyb:7
u8   dac_enable:1
}
}
union {
u8   testreg2C
struct {
u8   dummyc:3
u8   dac_low:1
u8   test_readop:1
u8   dac_override:1
u8   test_pinctrl:1
u8   test_pindir:1
}
}
u8   ch3op1_fnum_low
union {
u8   ch3op1_fhireg
struct {
u8   ch3op1_fnum_high:3
u8   ch3op1_block:3
u8   ch3op1_dummy:2
}
}
u8   ch3op2_fnum_low
union {
u8   ch3op2_fhireg
struct {
u8   ch3op2_fnum_high:3
u8   ch3op2_block:3
u8   ch3op2_dummy:2
}
}
u8   ch3op3_fnum_low
union {
u8   ch3op3_fhireg
struct {
u8   ch3op3_fnum_high:3
u8   ch3op3_block:3
u8   ch3op3_dummy:2
}
}
opn2_channel_t   chan [6]
};

---

Field Documentation

struct { ... }

u8 opn2_chip_t::ALL[144]

u8 opn2_chip_t::ch3_mode

u8 opn2_chip_t::ch3op1_block

u8 opn2_chip_t::ch3op1_dummy

u8 opn2_chip_t::ch3op1_fhireg

u8 opn2_chip_t::ch3op1_fnum_high

u8 opn2_chip_t::ch3op1_fnum_low

u8 opn2_chip_t::ch3op2_block

u8 opn2_chip_t::ch3op2_dummy

u8 opn2_chip_t::ch3op2_fhireg

u8 opn2_chip_t::ch3op2_fnum_high

u8 opn2_chip_t::ch3op2_fnum_low

u8 opn2_chip_t::ch3op3_block

u8 opn2_chip_t::ch3op3_dummy

u8 opn2_chip_t::ch3op3_fhireg

u8 opn2_chip_t::ch3op3_fnum_high

u8 opn2_chip_t::ch3op3_fnum_low

opn2_channel_t opn2_chip_t::chan[6]

u8 opn2_chip_t::dac_enable

u8 opn2_chip_t::dac_high

u8 opn2_chip_t::dac_low

u8 opn2_chip_t::dac_override

u8 opn2_chip_t::dacenablereg

u8 opn2_chip_t::dummy2

u8 opn2_chip_t::dummy5

u8 opn2_chip_t::dummy8

u8 opn2_chip_t::dummyb

u8 opn2_chip_t::dummyc

u8 opn2_chip_t::gate_channel

u8 opn2_chip_t::gate_op1

u8 opn2_chip_t::gate_op2

u8 opn2_chip_t::gate_op3

u8 opn2_chip_t::gate_op4

u8 opn2_chip_t::gatereg

u8 opn2_chip_t::lfo_enabled

u8 opn2_chip_t::lfo_freq

u8 opn2_chip_t::lforeg

u8 opn2_chip_t::test_lfo_unk

u8 opn2_chip_t::test_noeg

u8 opn2_chip_t::test_nopg

u8 opn2_chip_t::test_pinctrl

u8 opn2_chip_t::test_pindir

u8 opn2_chip_t::test_readdat

u8 opn2_chip_t::test_readmsb

u8 opn2_chip_t::test_readop

u8 opn2_chip_t::test_selrd14

u8 opn2_chip_t::test_tmrspd

u8 opn2_chip_t::test_ugly

u8 opn2_chip_t::testreg21

u8 opn2_chip_t::testreg2C

u8 opn2_chip_t::timera_enable

u8 opn2_chip_t::timera_high

u8 opn2_chip_t::timera_load

u8 opn2_chip_t::timera_low

u8 opn2_chip_t::timera_reset

u8 opn2_chip_t::timeralowreg

u8 opn2_chip_t::timerb

u8 opn2_chip_t::timerb_enable

u8 opn2_chip_t::timerb_load

u8 opn2_chip_t::timerb_reset

u8 opn2_chip_t::timerctrlreg

---

The documentation for this union was generated from the following file:

• modules/genesis/genesis.h